Exemplary implementations of the herein disclosed subject matter relate to semiconductor memory devices, and in particular, to three-dimensional nonvolatile memory devices.
Higher integration of semiconductor devices is required to satisfy consumer demands for superior performance and inexpensive prices. In the case of semiconductor devices, since their integration is an important factor in determining product prices, increased integration is especially required. In the case of typical two-dimensional or planar semiconductor devices, since their integration is mainly determined by the area occupied by a unit memory cell, integration is greatly influenced by the level of a fine pattern forming technology. However, the extremely expensive process equipment needed to increase pattern fineness sets a practical limitation on increasing integration for two-dimensional or planar semiconductor devices.
To overcome such a limitation, three-dimensional (3D) semiconductor devices including three-dimensionally-arranged memory cells have been proposed. However, there are significant manufacturing obstacles in achieving low-cost, mass-production of 3D semiconductor memory devices, particularly in the mass-fabrication of 3D devices that maintain or exceed the operational reliability of their 2D counterparts.